Title:Design and Development of 4-Bit Gray Code Counter Circuit Using Reversible Logic Gate
Volume: 13
Issue: 1
Author(s): Heranmoy Maity*, Barnali Sen , Ishika Verma , Arindam Biswas , Anita Pal and Anup K. Bhattacharjee
Affiliation:
- Dept. of ECE, NSHM Knowledge Campus Durgapur, West Bengal,India
Keywords:
Quantum computing, gray code, reversible logic gate, quantum cost, garbage output, constant input.
Abstract:
Aim: This paper proposed the design and development of 4-Bit Gray Code Counter Circuit
Using Reversible Logic Gate.
Methods: The 4-Bit Gray Code Counter Circuit can be design using SAM gate, Feynman gate (FG),
double Feynman gate (DFG) and NOT gate. The proposed circuit is the combined application of 4-bit
binary asynchronous counter and 4-bit binary to gray code converter circuit.
Results: The proposed gray code counter is designed using four no. of SAM gate, three no. of DFG,
one FG and seven reversible NOT gate. The QC, GO and CI of proposed circuit are correspondingly
30, 4 and 7.
Conclusion: The novel reversible gray code counter have been designed using existing reversible logic
gate. The proposed gray code counter is designed using four no. of SAM gate, three no. of DFG, one FG
and seven reversible NOT gate. The QC, GO and CI of proposed circuit are correspondingly 30, 4 and 7.
